1. Field of the Invention
The invention relates to a circuit arrangement and method used to store configuration data for a device unit which holds devices, where the identity of a particular device unit is verified and configuration data is released to the device unit after successful verification.
2. Description of the Prior Art
Configuration data that must be permanently stored has historically been stored in storage units on a processor unit or on rear panel printed circuit boards. This storage has been implemented as programmable read-only memories (EEPROM or EPROM). Unfortunately, these programmable read-only memories are mechanically difficult to exchange, and are susceptible to mistakes due to programming errors or exchanging the wrong memory.
The object of the invention is to provide a circuit arrangement and a method for checking data that avoids the above-mentioned disadvantages. This objective is inventively achieved by utilizing an identifier storage unit that is inseparably connected to a rear panel of a device unit (sub-rack). This identifier storage unit holds a permanent identifier, and this permanent identifier is compared to identifiers stored in plug-in subassemblies (boards or circuitry that plugs into the sub-rack). Configuration data located on the subassemblies, and associated with the plug-in assembly identifiers, can then be released to the device unit given a conformity between the plug-in assembly identifiers and the permanent identifier on the rear panel of the device unit.
The invention has the following advantages: 1) the second storage unit is not susceptible to failures and does not have to be exchanged, 2) data mistakes by programming errors or by assembling the second storage unit is precluded, 3) configuration data can be redundantly stored within homogenous plug-in subassemblies or device units, in which valid data records can be securely differentiated from data that potentially do not belong to the device, and 4) the second storage is inseparably connected to the rear panel printed circuit board. Further advantageous embodiments of the circuit arrangement and the method are described below.